Bluespec, Inc. releases a second family of open-source RISC-V processors to spur open innovation:
- New Flute RISC-V processor is easily customized for IoT
- RISC-V is ushering in a new era of processor innovation
- Download a 32-bit or 64-bit Flute RISC-V core now
December 13, 2018 – Bluespec Inc. has released Flute, its second in a family of commercially supported open-source RISC-V processors.
Flute is a configurable 5-stage application processor complementing the previously released 3-stage Piccolo microcontroller, both of which are suitable for IoT. The initial release provides synthesizable Verilog for a bare metal RV32IMA core and a supervisor level RV64IMA core. Future releases will add floating point and compressed instructions (RV32GC/RV64GC) and run Linux and FreeRTOS. The Flute download (here) provides working Verilator and Icarus simulations and the Verilog has been tested in Xilinx UltraScale/UltraScale+ boards.
“The availability of commercially-backed open-source processor cores is a unique RISC-V value proposition”, says Rick O’Connor, Executive Director of the RISC-V Foundation. “With the emergence of the free and open RISC-V ISA an open-source business model is now possible for processor IP. This will certainly help RISC-V ignite a new era of hardware innovation, as Linux did for software.”
RISC-V has demonstrated that open collaboration can produce an industrial strength ISA. The independent RISC-V Foundation (www.riscv.org) maintains the ISA and has over 200 members, including many notable high-tech companies. RISC-V dominates computer architecture
“We are using Bluespec’s Flute core as a fast and efficient way to take to market our Posit Numeric Unit IP,” says Anantha Kinnal, Co-founder & Director of Calligo Technologies, an HPC/AI Company based in Bangalore, India. “It provides us customization opportunities, an ability to focus on our value-added technology and confidence to go to market with the necessary commercial support.”
Bluespec, Inc. provides hardware development tools that reduce the time, effort and risk of developing RISC-V processors and systems. It is a founding member of the RISC-V Foundation and a leader in the RISC-V open-source movement that is paving the way for a new wave of open innovation in processor-based systems.