Bluespec, Inc.

"With less than a week of training, we were able to significantly accelerate design and with much fewer bugs. I completed the design much faster than we did with the original Verilog RTL design. It fully passed our comprehensive regression suite, met timng, and had 30% fewer gates than the original.

"Providing the engineer full control of architecture through to synthesized RTL, Bluespec enables rapid exploration of different architectures to quickly obtain an optimal, functionally correct implementation.

"Bluespec is the future of design."

Senthil Krishnamoorthy, Principal Engineer, Aarohi Communications, Inc.

Bluespec partners with a variety of industry and academic leaders including:

EDA vendors
IP vendors
Universities

to ensure product integration, interoperability, and enhanced customer support. As a member of Accellera and IEEE, Bluespec has been an active contributor to the SystemVerilog language and participant in the standardization process. Bluespec is committed to standardization and interoperability -- please refer to this page to learn more.

To learn about Bluespec's University Program, please click here.

Bluespec's Partnerships

	Xilinx ESL Ecosystem
	Altera ACCESS Program
	The Dini Group is a professional hardware and software engineering firm specializing in high performance digital circuit design and application development.
	Synopsys SystemVerilog Catalyst Program
	Model Technology Value Added Partner
	Magma MagmaTies Program
	SpringSoft Novas Harmony Partner Program
	Atomic Rules understands the limitations of composing complex processor interactions using conventional RTL methods. Atomic Rules provides its clients with expert SoC/FPGA competencies that build upon RTL/ESL design and verification techniques; not reinvent them.

Request a Demo
Schedule a WebEx or
a live demonstration

Download
Whitepaper on Enabling Emulation and FPGA Prototyping on Every Desktop

Have Sales
Contact You