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  Topic: New Release 2012.01.A is posted
kczeck

Replies: 0
Views: 9499

PostForum: Announcements   Posted: Fri Feb 03, 2012 11:18 am   Subject: New Release 2012.01.A is posted
The latest Bluespec release 2012.01.A is available to registered users of the forum via Software Releases at http://bluespec.com/forum/viewtopic.php?t=306. You must be logged in to the forum to see a ...
  Topic: BSV Training Labs
kczeck

Replies: 7
Views: 33543

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Tue Jan 24, 2012 3:26 pm   Subject: DMA Controller Lab
This lab leads you through basic aspects writing a BSV program by building a DMA controller. The lab uses the Bluespec Development Workstation for Bluesim and Verilog simulations.
  Topic: BSV Tutorials
kczeck

Replies: 7
Views: 35627

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Tue Nov 15, 2011 10:51 am   Subject: Small Examples
This is a series of small BSV examples to illustrate various language concepts in Bluespec SystemVerilog (BSV). Each example is as small as possible, illustrating just one concept (goal: one page or l ...
  Topic: System Requirements for Bluespec - 2012.01.A
kczeck

Replies: 0
Views: 7321

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Mon Aug 08, 2011 11:30 am   Subject: System Requirements for Bluespec - 2012.01.A
Minimum Recommended System:

CPU -- 1 GHz Pentium x86 processor (32 bit or 64 bit)
RAM -- 512 MB memory for labs, 1 GB memory for design work
Disk -- 512 MB free disk space
OS -- 32-bit or 64 bit ...
  Topic: New release 2011.06.D is posted
kczeck

Replies: 0
Views: 5648

PostForum: Announcements   Posted: Thu Jul 14, 2011 10:51 am   Subject: New release 2011.06.D is posted
The latest Bluespec release 2011.06.D is available to registered users of the forum via Software Releases at http://www.bluespec.com/forum/viewtopic.php?t=273. You must be logged in to the forum to s ...
  Topic: BSV Tutorials
kczeck

Replies: 7
Views: 35627

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Thu Jun 30, 2011 9:54 am   Subject: Emulation App (emVM) tutorial for SW-HW Co-Execution (1/12)
This tutorial provides complete examples for implementing an Emulation App (emVM) system with Bluespec tools and components, including using Bluespec-provided transactors as well as writing your own t ...
  Topic: BSV Product Documentation
kczeck

Replies: 8
Views: 53253

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Thu Jun 30, 2011 9:41 am   Subject: Emulation App (emVM) User Manual
This document describes Bluespec's Emulation App (emVM) environment for implementing software-hardware co-emulation with FPGAs.
  Topic: BSV Product Documentation
kczeck

Replies: 8
Views: 53253

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Thu Nov 18, 2010 8:49 am   Subject: BSV by Example
This book teaches the BSV language through small, complete, executable BSV programs. While not an exhaustive reference manual of all BSV features, it describes many of the most commonly used features ...
  Topic: New release 2009.10.B posted
kczeck

Replies: 0
Views: 8324

PostForum: Announcements   Posted: Tue Oct 20, 2009 8:12 am   Subject: New release 2009.10.B posted
The latest Bluespec release 2009.10.B is available to registered, and logged in, users of the forum via Software Releases at www.bluespec.com/forum/viewtopic.php?t=212
  Topic: BSV Tutorials
kczeck

Replies: 7
Views: 35627

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Mon Oct 19, 2009 8:48 am   Subject: importBVI
This tutorial describes methods for wrapping an RTL model (Verilog or VHDL) for use in a BSV design. Different design options are discussed, along with examples.
  Topic: BSV Application Notes
kczeck

Replies: 2
Views: 17522

PostForum: Bluespec SystemVerilog (BSV) Documents, Examples and Technical White Papers   Posted: Thu Sep 03, 2009 11:45 am   Subject: Using RTL Models in Bluespec SystemVerilog
Existing RTL modules can be used as part of a Bluespec SystemVerilog (BSV) design. The BSV import "BVI" statement defines a Bluespec module wrapper for a Verilog or VHDL module, transcribin ...
  Topic: Vim help Utility
kczeck

Replies: 0
Views: 8908

PostForum: Contributed tidbits   Posted: Tue Jun 02, 2009 9:16 am   Subject: Vim help Utility
This tar file contains Bluespec help files for use with vim.

To use:
untar the file
copy the txt files to .vim/doc (cp ./vimdoc_sample_v1/*.txt ~/.vim/doc)

In vim generate the help ...
  Topic: Arbiter Example
kczeck

Replies: 0
Views: 8659

PostForum: Contributed tidbits   Posted: Mon Jun 01, 2009 9:10 am   Subject: Arbiter Example
This example shows how you can start with default arbitration and then refine it to have more sophisticated arbitration, using a parameterized round-robin arbiter from the BSV library.

The tar file ...
  Topic: how to generate Makefile and run it for our .bsv codes
kczeck

Replies: 7
Views: 14911

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Mon May 18, 2009 8:58 am   Subject: how to generate Makefile and run it for our .bsv codes
The tool menu is not yet available - it is being added in an upcoming release. Until then, the Export Makefile option is under the Project menu (Project -> Export Makefile). There is no differenc ...
  Topic: Errors in Tutorial Counter?
kczeck

Replies: 2
Views: 8739

PostForum: Tools: BSC (Bluespec Compiler)   Posted: Tue Jan 20, 2009 8:58 am   Subject: Errors in Tutorial Counter?
You are right - you can't use the name Counter for your package because there already is a bsv package named Counter.

The tutorial has been updated. The new version uses the Development workstati ...
 
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