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  Topic: pcie gen3 wrapper
jamey

Replies: 1
Views: 4811

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Wed Sep 02, 2015 11:16 am   Subject: pcie gen3 wrapper
The 2015.05.beta1 release has support for the VC709 but does not have support for multiple functions.

I'm adding gen3 support to Connectal. We use a tcl script to instantiate the core:
https://g ...
  Topic: bluenoc pci issues
jamey

Replies: 1
Views: 4133

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Wed Sep 02, 2015 11:05 am   Subject: bluenoc pci issues
I have seen that same behavior in my BSV PCIe code, so it has a run time test on the upper bits of the address to choose between 3DW and 4DW headers.

It's nice to see confirmation that someone else ...
  Topic: Interfacing BSV with RTL in C
jamey

Replies: 3
Views: 7015

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Wed Sep 02, 2015 11:03 am   Subject: Interfacing BSV with RTL in C
In case you did not find a way to do this, we have a module like this that might be a helpful example:

https://github.com/cambridgehackers/connectal/blob/master/bsv/SimDma.bsv
  Topic: import BVI: same wrapper for multiple verilog modules
jamey

Replies: 3
Views: 3312

PostForum: Designing with BSV's Rules, Interfaces, ...   Posted: Wed Sep 02, 2015 10:54 am   Subject: import BVI: same wrapper for multiple verilog modules
We use a python script that we use to generate import "BVI" statements from Verilog files:

https://github.com/cambridgehackers/connectal/blob/master/generated/scripts/importbvi.py

...
  Topic: Does anyone have a 2D Convolution code in BSV?
jamey

Replies: 1
Views: 14473

PostForum: Contributed tidbits   Posted: Wed Jan 28, 2015 12:54 pm   Subject: Does anyone have a 2D Convolution code in BSV?
I'm looking for one also. If none exists, I could help on writing one using PAClib.

Jamey
 
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