Mentor has a white paper, entitled Why You Should Optimize Power at the ESL Level, that highlights the huge advantage of attacking power through architecture exploration. We couldn’t agree more – and in fact, we co-authored a similar piece back in late 2006 with Holly Stump of Sequence (at that time) entitled ESL Synthesis + Power Analysis = Optimal Micro-Architecture.
If you read our paper, and then look at either Mentor’s White Paper or an article they authored on Electronics Weekly, you might notice that all three pieces use the same table, a summary of power results from the architectural exploration of an 802.11a WiFi transmitter:

This table came from a terrific IEEE MEMOCODE 2006 paper entitled, 802.11a Transmitter: A Case Study in Microarchitectural Exploration authored by Nirav Dave, Michael Pellauer, Steve Gerding, & Arvind. What Mentor fails to mention is that the exploration of the 802.11a transmitter, which rapidly explored 7 different micro architectures and achieved excellent Quality of Results in the process, was performed using Bluespec. In fact, that was one of the key points of the paper. One of the team members, upon learning about the use of their table remarked:
“Do they not realize the point of that paper was that it (was) written in Bluespec?”
Achieving the lowest power is not only about rapid architectural exploration, but also about:
- Enabling no compromises in QoR relative to the same micro-architecture in RTL
- Reaching, in the shortest amount of time and in a predictable fashion, any micro-architecture the designer can envision
With some tools, you might sometimes get the first. With Bluespec, with its 100% architectural transparency and 100% designer control over architecture, you get all three, consistently, without surprises.